EL7554
Thermal Management
The EL7554IRE is packaged in a thermally-efficient
HTSSOP-28 package, which utilizes the exposed thermal
pad at the bottom to spread heat through PCB metal.
Therefore:
1. The thermal pad must be soldered to the PCB
2. Maximize the PCB area
3. If a multiple layer PCB is used, thermal vias (13 to 25 mil)
must be placed underneath the thermal pad to connect to
ground plane(s). Do not place thermal reliefs on the vias.
Figure 25 shows a typical connection.
The thermal resistance for this package is as low as +26°C/W
for 2 layer PCB of 0.39" thickness (see Figure 9). The actual
junction temperature can be measured at V TJ pin.
The thermal performance of the IC is heavily dependent on
the layout of the PCB. The user should exercise care during
the design phase to ensure the IC will operate within the
recommended environmental conditions.
Layout Considerations
The layout is very important for the converter to function
properly. Follow these tips for best performance:
1. Separate the Power Ground ( ) and Signal Ground ( );
connect them only at one point right at the SGND pin
2. Place the input capacitor(s) as close to V IN and PGND
pins as possible
3. Make as small as possible the loop from LX pins to L to
C O to PGND pins
4. Place R 1 and R 2 pins as close to the FB pin as possible
5. Maximize the copper area around the PGND pins; do not
place thermal relief around them
6. Thermal pad should be soldered to PCB. Place several
via holes under the chip to the ground plane to help heat
dissipation
The demo board is a good example of layout based on this
outline. Please refer to the EL7554 Application Brief.
COMPONENT SIDE
CONNECTION
GROUND PLANE
CONNECTION
FIGURE 25. PCB LAYOUT - 28 Ld HTSSOP PACKAGE
13
FN7360.5
November 5, 2007
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